This invention relates to a method of synchronization status message processing in a transmission apparatus. More particularly, the invention relates to a method of synchronization status message processing in a transmission apparatus in which a clock extracted from a main signal in which a synchronization status message indicating the best quality level has been inserted is adopted as a master clock and signal processing is executed in synchronization with the master clock.
The world-wide trend toward the adoption of SDH (Synchronous Digital Hierarchy) for networks in optical transmission is continuing. FIG. 15 is a diagram for describing the structure of a frame in accordance with the SONET (Synchronous Optical Network) standard, which is the synchronous network communications standard used in North America. This is for a case where the transmission rate is 155.52 Mbps. One frame is composed of 9.times.270 bytes. The first 9.times.9 bytes constitute section overhead (SOH), and the remaining bytes constitute path overhead (POH) and payload (PL), the latter being a section which transmits information at 150 Mbps.
The section overhead SOH is composed of repeater section overhead of 3.times.9 bytes, a pointer of 1.times.9 bytes and multiplex section overhead of 5.times.9 bytes. As shown in FIG. 16, the multiplex section is the section between terminal repeater units 1, 2. In a case where a number of transmission lines 3a.about.3c and repeaters 4a, 4c are provided between the terminal repeater units 1, 2, the repeater section is the section between both ends of one transmission line, and the multiplex section is composed of a plurality of repeater sections.
As shown in FIG. 17, the repeater section overhead has bytes A1.about.A2, C1, B1, E1, F1, D1.about.D3, and the multiplex section overhead has bytes B2, K1.about.K2, D4.about.D12, S1, Z1.about.Z2. The meaning of each byte is illustrated in FIG. 18. The repeater section overhead transmits frame synchronizing signals (bytes A1, A2), an error monitoring signal (byte B1) for monitoring error in the repeater section, a fault specifying signal (byte F1) for specifying a fault in the repeater section, etc. The multiplex section overhead transmits an error monitoring signal (byte B2) for monitoring error in the section, a changeover signal (byte K1) for switching between a standby system and a working system, a transfer signal (byte K2) for transferring the status in the multiplex section and a synchronization status message Sync Msg (S1 byte).
The synchronization status message Sync Msg is a message indicating the quality level (accuracy) of the clock. In order to construct a synchronous network in an SDH network, this message is sent and received using the overhead (S1 byte) of the SONET signal or the data link of an ESF DS1 signal. The transmission apparatus selects, as a master clock (reference clock), the clock having the best quality from among a plurality of input clocks and transmits data in sync with the master clock.
FIG. 19 is a table for describing the synchronization status message Sync Msg and quality level. The correspondence among eight synchronization status messages (PRS, STU, ST2, ST3, SIC, ST4, DUS, RES), their quality levels and clock accuracies is stipulated. The synchronization status messages ST2, ST3 indicate the quality levels of holdover (HO) clocks. When external supply of a clock ceases, an HO clock is created within the apparatus based upon the master clock that was in use immediately before the cessation of the external clock. The created clock is used within the apparatus. The synchronization status message ST4 is an internal (INT) clock. This is created independently within the apparatus and is used when the HO clock cannot be used. The DUS (Don't Use for Sync) synchronization status message indicates that the clock is not usable as the master clock.
FIG. 20 is a diagram useful in describing the clock selecting operation of a transmission apparatus NE. The left side of the transmission apparatus NE serves as a LINE1 side and the right side as a LINE2 side.
The transmission apparatus NE includes a quality acquisition/setting unit QRS. The quality acquisition/setting unit QRS (1) identifies/acquires the quality of each input clock based upon a synchronization status message set in the overhead S1 byte of a main signal in the UP direction input from the LINE1 side and of a main signal in the DOWN direction input from the LINE2 side, and (2) sets a synchronization status message, which indicates the quality of the master clock, in the overhead S1 byte of a main signal in the UP direction output from the LINE2 side and of a main signal in the DOWN direction output from the LINE1 side, and transmits the message.
The transmission apparatus NE further includes a CPU, which is a processor for comparing the quality levels of the clocks acquired by the quality acquisition/setting unit QRS and adopting the clock having the best quality as the master clock, and a master clock selector MCS which, in response to an indication from the CPU, selects the clock having the highest quality level as the master clock.
The transmission apparatus NE sets the synchronization status message indicating the quality of the master clock in the overhead S1 byte of the main signal sent in the UP direction and, in sync with this master clock, sends the main signal in the UP direction from the LINE2 side. Further, the transmission apparatus NE sets the synchronization status message indicating the quality of the master clock in the overhead S1 byte of the main signal sent in the DOWN direction and, in sync with this master clock, sends the main signal in the DOWN direction from the LINE1 side.
The foregoing is for the case of normal operation. If a fault develops in the master clock selector MCS, it is no longer possible to assure that the quality level of the master signal will be the best. Accordingly, in order to arrange it so that this master clock will not be usable in another transmission apparatus connected to the network, the quality acquisition/setting unit QRS adopts DUS (Don't Use for Sync) as the synchronization status message set in the overhead S1 byte of the main signals in the UP and DOWN directions.
In this connection, certain problems arise in the prior art.
(1) Conventionally, one transmission apparatus is constituted by one shelf and control of the clock is carried out by one CPU. Though the sending and receiving of synchronization status messages in a one-shelf/one transmission apparatus arrangement is stipulated by the SONET standard, there is no stipulation concerning the processing of synchronization status messages in an arrangement in which one transmission apparatus is composed of a plurality of shelves. Such processing needs to be stipulated. PA1 (2) In a transmission apparatus having a plurality of shelves, the master shelf incorporates a unit (a system timing processing unit) which decides the master clock and sends it to each of the shelves. If this unit fails, there will no longer be any assurance that the quality of the master clock is the best. If this clock is used as the master clock in another transmission apparatus, network synchronization will be lost. PA1 (3) Each slave shelf has a unit for selecting and processing the master clock sent from the master shelf. If this unit fails, there will no longer be any assurance that the master clock selected by this unit is that having the best quality. If this clock is used as the master clock in another transmission apparatus, network synchronization will be lost. PA1 (4) If the cable for sending the master clock from the master shelf to a slave shelf is severed, the slave shelf executes processing in sync with the HO (holdover) clock or INT (internal) clock. This makes it necessary to insert a synchronization status message indicating the quality of the HO (holdover) clock or the quality of the INT (Internal) clock in the overhead S1 byte of the main signal sent from the shelf. However, the insertion of such a synchronization status message cannot be carried out in a simple manner. PA1 (5) When processing for deciding the master clock is being carried out by the master shelf, what master clock should be used by the shelves is unclear. Accordingly, for the short period of time during which the master clock decision processing is being executed, a self-timing clock such as the HO (holdover) clock or INT (Internal) clock is used as a reference clock. After the master clock is selected, a state is attained in which this master clock is used. More specifically, the shelves use three types of clocks by switching among them in a short period of time. Whenever the clock used is switched over in such case, a synchronization status message which indicates the quality of this clock is inserted into the main signal. Since quality is changed over in a short period of time, however, changeover of the master clock occurs frequently in the other stations of the network as well. This leads to instability of the overall network and loss of network synchronization.
More specifically, it is recent practice to construct one system (transmission apparatus) from a plurality of shelves and partition the shelves into a master shelf (MASTER) which performs overall management of the apparatus, and slave shelves (SLAVE) which operate under the control of the master shelf. Each shelf is equipped with a CPU for executing clock control. Overall clock control is performed by the CPU of the master shelf. In a transmission apparatus having a plurality of shelves, a main signal is input to each shelf, meaning that a large number of main signals enter the apparatus. The master shelf acquires the synchronization status messages and clocks of these main signals, identifies the qualities of the clocks from the synchronization status messages, selects the clock having the best quality as the master clock and sends the master clock to each shelve, thereby synchronizing the shelves. To this end, the overhead S1 bytes are transmitted, along with the clocks, from the slave shelves to the master shelf via a clock delivery cable, and the master shelf is made to implement the synchronization status message function. With this method, however, the master shelf must sense the synchronization status messages and identify the clock qualities. The result is an increase in the load upon the master shelf.